MID-069: Electrical Fault Protection

Mitigation Tier: Intermediate

Description

Externally accessible I/O ports should be protected against damaging electrical faults such as electro-static discharge (ESD), voltage transients, surges, reverse polarity, etc. Protections include adding protection circuits to vulnerable ports (e.g., protection diodes, optoisolators, etc.) and selecting ICs and other components that are more resilient to electrical faults. In addition to general guidance, industry-specific standards exist for many embedded device market domains that provide recommendations and requirements tailored more specifically to the needs of each domain (e.g., automotive, medical, etc.)

IEC 62443 4-2 Mappings

• EDR / HDR / NDR (1) 3.11 - Physical tamper resistance and detection

References

[1] “Design Guide: TIDA-00731 IEC ESD, EFT, and Surge RS-485 Bus Protection Design Guide,” Texas Instruments, TIDUAS1B, 2019. Accessed: Aug. 28, 2024. [Online]. Available: https://www.ti.com/lit/ug/tiduas1b/tiduas1b.pdf?ts=1721068648253

[2] Analog Devices. “ESD Protection for I/O Ports.” analog.com. Accessed: Aug. 28, 2024. [Online]. Available: https://www.analog.com/en/resources/technical-articles/esd-protection-for-io-ports.html

[3] V. Nandam, L. Ghulyani, “Simplifying EFT, Surge and Power-Fail Protection Circuits in PLC Systems,” Texas Instruments, SLVA833D, 2021. Accessed: Aug. 28, 2024. [Online]. Available: https://www.ti.com/lit/an/slva833d/slva833d.pdf?ts=1721068743110

MID-069