MID-050: Operating System Defenses Against Microarchitecture Feature Side Channels
Mitigation Tier: Foundational
Description
A device’s system software (operating system, hypervisor, etc.) can take precautions to defend against data leakage due to memory timing and speculative execution side channels like Spectre and Meltdown, and other more recently discovered issues with other processor microarchitecture features.
For example, context switches can be hardened to better isolate memory between lower and higher privileged contexts, strengthening page table separation, and invalidating caches. Additionally, compiler-based mitigations like the “retpoline” technique are effective against the branch target injection vulnerability in Spectre.
Note: Where applicable, the system firmware and OS should ensure any relevant CPU microcode updates are applied that include patches for such vulnerabilities.
Limitation: These software-based defenses have unavoidable performance impacts that can be significant depending on the workload involved.
IEC 62443 4-2 Mappings
- none
References
[1] C. Stevens, N. Poggi, T. Desrosiers, R. Xin. “Meltdown and Spectre: Exploits and Mitigation Strategies.” Databricks. Accessed: Aug. 27, 2024. [Online.] Available: https://www.databricks.com/blog/2018/01/16/meltdown-and-spectre-exploits-and-mitigation-strategies.html